Detail CWE-1476

CWE-1476

Improper Request Propagation before Data Reception in Write Transactions in a Bus Architecture
2026-10-28
00h00 +00:00
Incomplete
CWE Mitre.org
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Nama: Improper Request Propagation before Data Reception in Write Transactions in a Bus Architecture

The product uses a multi-manager shared bus architecture with an on-chip interconnect that speculatively propagates a request for a write transaction, but it does not ensure that the remaining steps required by the manager module to complete the request are fulfilled in a timely manner.

Informasi Umum

Detail Latar Belakang

Mode Pengenalan


Platform yang Berlaku

Bahasa

Kelas: Not Language-Specific (Undetermined)

Arsitektur

Nama: ARM (Undetermined)
Kelas: Not Architecture-Specific (Undetermined)

Teknologi

Nama: Bus/Interface Hardware (Undetermined)
Nama: Communication Hardware (Undetermined)
Kelas: System on Chip (Undetermined)

Konsekuensi Umum

Cakupan Dampak Kemungkinan
AvailabilityDoS: Prevent AccessHigh

Contoh yang Diamati

Referensi Deskripsi

[REF-1586]

Certain commercial AXI interconnect IPs could allow a manager to cause bus stalls.

Mitigasi yang Memungkinkan

Metode Deteksi

Architecture or Design Review

Efektivitas : Opportunistic

Formal Verification

Efektivitas : High

Simulation / Emulation

Efektivitas : Moderate

Catatan Pemetaan Kerentanan

Justifikasi : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Komentar : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.

Referensi

REF-1585

Cut and Forward: Safe and Secure Communication for FPGA System on Chips
Francesco Restuccia, Ryan Kastner.
https://ieeexplore.ieee.org/document/9852740

REF-1586

Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC
Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgio Buttazzo.
https://ieeexplore.ieee.org/abstract/document/9114758

REF-1587

[AXI-REALM: A lightweight and modular interconnect extension for traffic regulation and monitoring of heterogeneous real-time SoCs
Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Luca Benini.
https://ieeexplore.ieee.org/document/10546511

REF-1588

Safety verification of third-party hardware modules via information flow tracking
Andres Meza, Francesco Restuccia, Ryan Kastner, Jason Oberg.
https://kastner.ucsd.edu/wp-content/uploads/2022/08/admin/rage22-safety.pdf

Pengajuan

Nama Organisasi Tanggal Tanggal rilis Version
Francesco Restuccia University of California San Diego 2022-08-25 +00:00 2026-10-28 +00:00 5.0
Informasi yang disajikan di CVE Find berasal dari beberapa sumber referensi yang dipilih dengan cermat. Data CVE disediakan oleh MITRE Corporation dan National Vulnerability Database (NVD). Katalog Known Exploited Vulnerabilities (KEV) bersumber dari Cybersecurity and Infrastructure Security Agency (CISA), sementara skor EPSS berasal dari FIRST.org. Selain itu, data mengenai kelemahan perangkat lunak (CWE) dan pola serangan umum (CAPEC) dikelola oleh MITRE Corporation, dan informasi tentang konfigurasi perangkat keras dan perangkat lunak (CPE) disediakan oleh NVD.