Modes Of Introduction
Architecture and Design : This weakness can appear in designs that use register write-once attributes with two or more software/firmware modules with varying levels of trust executing in parallel.
Piattaforme applicabili
Linguaggio
Name: Verilog (Undetermined)
Name: VHDL (Undetermined)
Tecnologie
Class: System on Chip (Undetermined)
Conseguenze comuni
| Ambito |
Impatto |
Probabilità |
| Access Control | Bypass Protection Mechanism
Note: System configuration cannot be programmed in a secure way. | |
Potential Mitigations
Phases : Architecture and Design
During hardware design, all register write-once or sticky fields must be evaluated for proper configuration.
Detection Methods
Automated Analysis
The testing phase should use automated tools to test that values are not reprogrammable and that write-once fields lock on writing zeros.
Note sulla mappatura delle vulnerabilità
Giustificazione : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Commento : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
Pattern di attacco correlati
| CAPEC-ID |
Nome del pattern di attacco |
| CAPEC-26 |
Leveraging Race Conditions
The adversary targets a race condition occurring when multiple processes access and manipulate the same resource concurrently, and the outcome of the execution depends on the particular order in which the access takes place. The adversary can leverage a race condition by "running the race", modifying the resource and modifying the normal execution flow. For instance, a race condition can occur while accessing a file: the adversary can trick the system by replacing the original file with their version and cause the system to read the malicious file. |
Invio
| Nome |
Organizzazione |
Data |
Data di rilascio |
Version |
| Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna, Narasimha Kumar V Mangipudi |
Intel Corporation |
2019-12-12 +00:00 |
2020-02-24 +00:00 |
4.0 |
Modifiche
| Nome |
Organizzazione |
Data |
Commento |
| CWE Content Team |
MITRE |
2020-08-20 +00:00 |
updated Related_Attack_Patterns |
| CWE Content Team |
MITRE |
2022-10-13 +00:00 |
updated Demonstrative_Examples |
| CWE Content Team |
MITRE |
2023-04-27 +00:00 |
updated Relationships |
| CWE Content Team |
MITRE |
2023-06-29 +00:00 |
updated Mapping_Notes |
| CWE Content Team |
MITRE |
2025-04-03 +00:00 |
updated Demonstrative_Examples |
| CWE Content Team |
MITRE |
2025-12-11 +00:00 |
updated Detection_Factors, Potential_Mitigations, Weakness_Ordinalities |