CWE-1296
Incorrect Chaining or Granularity of Debug Components
2020-08-20
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특정 CWE 알림
특정 CWE의 변경 사항에 대한 정보를 받아보세요.
이름: Incorrect Chaining or Granularity of Debug Components
The product's debug components contain incorrect chaining or granularity of debug components.
일반 정보
배경 세부 정보
취약점 도입 방식
Implementation : Logic errors during design or synthesis could misconfigure the interconnection of the debug components, which could allow unintended access permissions.적용 가능한 플랫폼
언어
이름: Verilog (Undetermined)이름: VHDL (Undetermined)
클래스: Not Language-Specific (Undetermined)
운영 체제
클래스: Not OS-Specific (Undetermined)아키텍처
클래스: Not Architecture-Specific (Undetermined)기술
이름: Processor Hardware (Undetermined)클래스: Not Technology-Specific (Undetermined)
일반적인 결과
| 범위 | 영향 | 가능성 |
|---|---|---|
| Confidentiality Integrity Access Control Authentication Authorization Availability Accountability | Gain Privileges or Assume Identity, Bypass Protection Mechanism, Execute Unauthorized Code or Commands, Modify Memory, Modify Files or Directories 참고: Depending on the access to debug component(s) erroneously granted, an attacker could use the debug component to gain additional understanding about the system to further an attack and/or execute other commands. This could compromise any security property, including the ones listed above. | Medium |
관찰된 예시
| 참고 자료 | 설명 |
|---|---|
CVE-2017-18347 | Incorrect access control in RDP Level 1 on STMicroelectronics STM32F0 series devices allows physically present attackers to extract the device's protected firmware via a special sequence of Serial Wire Debug (SWD) commands because there is a race condition between full initialization of the SWD interface and the setup of flash protection. |
CVE-2020-1791 | There is an improper authorization vulnerability in several smartphones. The system has a logic-judging error, and, under certain scenarios, a successful exploit could allow the attacker to switch to third desktop after a series of operations in ADB mode. (Vulnerability ID: HWPSIRT-2019-10114). |
잠재적 완화 방법
Phases : ImplementationEnsure that debug components are properly chained and their granularity is maintained at different authentication levels.
탐지 방법
Architecture or Design Review
Appropriate Post-Si tests should be carried out at various authorization levels to ensure that debug components are properly chained and accessible only to users with appropriate credentials.효과성 : High
Dynamic Analysis with Manual Results Interpretation
Appropriate Post-Si tests should be carried out at various authorization levels to ensure that debug components are properly chained and accessible only to users with appropriate credentials.효과성 : High
취약점 매핑 메모
근거 : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.댓글 : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
관련 공격 패턴
| CAPEC ID | 공격 패턴 이름 |
|---|---|
| CAPEC-121 | Exploit Non-Production Interfaces
|
| CAPEC-702 | Exploiting Incorrect Chaining or Granularity of Hardware Debug Components
|
메모
This entry is still under development and will continue to see updates and content improvements.제출
| 이름 | 조직 | 날짜 | 출시일 | Version |
|---|---|---|---|---|
| Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna | Intel Corporation | 4.2 |
수정 사항
| 이름 | 조직 | 날짜 | 댓글 |
|---|---|---|---|
| CWE Content Team | MITRE | updated Related_Attack_Patterns | |
| CWE Content Team | MITRE | updated Applicable_Platforms, Related_Attack_Patterns | |
| CWE Content Team | MITRE | updated Applicable_Platforms | |
| CWE Content Team | MITRE | updated Related_Attack_Patterns | |
| CWE Content Team | MITRE | updated Relationships | |
| CWE Content Team | MITRE | updated Mapping_Notes | |
| CWE Content Team | MITRE | updated Weakness_Ordinalities | |
| CWE Content Team | MITRE | updated Background_Details, Description, Modes_of_Introduction |
