Chi tiết CWE-1257

CWE-1257

Improper Access Control Applied to Mirrored or Aliased Memory Regions
2020-02-24
00h00 +00:00
Incomplete
2026-10-28
00h00 +00:00
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Quản lý thông báo

Tên: Improper Access Control Applied to Mirrored or Aliased Memory Regions

Aliased or mirrored memory regions in hardware designs may have inconsistent read/write permissions enforced by the hardware.

Thông tin chung

Chi tiết nền tảng

Các cách xuất hiện

Architecture and Design
Implementation

Nền tảng áp dụng

Ngôn ngữ

Lớp: Not Language-Specific (Undetermined)

Hệ điều hành

Lớp: Not OS-Specific (Undetermined)

Kiến trúc

Lớp: Not Architecture-Specific (Undetermined)

Công nghệ

Tên: Memory Hardware (Undetermined)
Tên: Processor Hardware (Undetermined)
Tên: Microcontroller Hardware (Undetermined)
Tên: Network on Chip Hardware (Undetermined)
Lớp: System on Chip (Undetermined)

Hậu quả phổ biến

Phạm vi Tác động Khả năng xảy ra
ConfidentialityRead Memory

Ghi chú: An untrusted agent might be blocked from accessing a memory region, but it is not blocked from accessing the corresponding aliased memory region.
High
IntegrityModify Memory

Ghi chú: An untrusted agent might be blocked from accessing a memory region, but it is not blocked from accessing the corresponding aliased memory region.
High
AvailabilityDoS: InstabilityHigh

Các biện pháp giảm thiểu tiềm năng

Phases : Architecture and Design // Implementation
The checks should be applied for consistency access rights between primary memory regions and any mirrored or aliased memory regions. If different memory protection units (MPU) are protecting the aliased regions, their protected range definitions and policies should be synchronized.
Phases : Architecture and Design // Implementation
The controls that allow enabling memory aliases or changing the size of mapped memory regions should only be programmable by trusted software components.

Ghi chú ánh xạ lỗ hổng

Lý do : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Bình luận : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.

Mẫu tấn công liên quan

ID CAPEC Tên mẫu tấn công
CAPEC-456 Infected Memory
An adversary inserts malicious logic into memory enabling them to achieve a negative impact. This logic is often hidden from the user of the system and works behind the scenes to achieve negative impacts. This pattern of attack focuses on systems already fielded and used in operation as opposed to systems that are still under development and part of the supply chain.
CAPEC-679 Exploitation of Improperly Configured or Implemented Memory Protections

Gửi

Tên Tổ chức Ngày Ngày phát hành Version
Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna, Narasimha Kumar V Mangipudi Intel Corporation 2020-04-29 +00:00 2020-02-24 +00:00 4.1

Sửa đổi

Tên Tổ chức Ngày Bình luận
CWE Content Team MITRE 2020-08-20 +00:00 updated Demonstrative_Examples, Description, Modes_of_Introduction, Potential_Mitigations, Related_Attack_Patterns
CWE Content Team MITRE 2021-10-28 +00:00 updated Potential_Mitigations
CWE Content Team MITRE 2022-04-28 +00:00 updated Applicable_Platforms, Related_Attack_Patterns
CWE Content Team MITRE 2022-06-28 +00:00 updated Applicable_Platforms
CWE Content Team MITRE 2022-10-13 +00:00 updated Demonstrative_Examples
CWE Content Team MITRE 2023-01-31 +00:00 updated Related_Attack_Patterns
CWE Content Team MITRE 2023-04-27 +00:00 updated Relationships
CWE Content Team MITRE 2023-06-29 +00:00 updated Mapping_Notes
CWE Content Team MITRE 2025-12-11 +00:00 updated Weakness_Ordinalities
CWE Content Team MITRE 2026-10-28 +00:00 updated Background_Details, Common_Consequences, Demonstrative_Examples, Description