CWE-1224
Improper Restriction of Write-Once Bit Fields
2020-02-24
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指定 CWE 通知
掌握特定 CWE 的任何變更。
名稱: Improper Restriction of Write-Once Bit Fields
The hardware design control register "sticky bits" or write-once bit fields are improperly implemented, such that they can be reprogrammed by software.
一般資訊
背景詳情
引入方式
Architecture and DesignImplementation : Such issues could be introduced during implementation of hardware design, since IP parameters and defaults are defined in HDL code and identified later during Testing or System Configuration phases.
適用平台
程式語言
名稱： Verilog (Undetermined)名稱： VHDL (Undetermined)
技術
類別： System on Chip (Undetermined)常見後果
| 範圍 | 影響 | 可能性 |
|---|---|---|
| Confidentiality Integrity Availability Access Control | Varies by Context, Modify Memory 注意：System configuration cannot be programmed in a secure way. Failure to implement write-once restrictions in hardware design can expose such registers to being re-programmed by software and written multiple times. For example, write-once fields could be implemented to only be write-protected if they have been set to value "1", wherein they would work as "write-1-once" and not "write-once". |
潛在緩解措施
Phases : Architecture and DesignDuring hardware design, all register write-once or sticky fields must be evaluated for proper configuration.
偵測方法
Automated Analysis
Use automated tools to test that values are not reprogrammable and that write-once fields lock on writing zeros.漏洞對應備注
理由說明 : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.備註 : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
相關攻擊模式
| CAPEC ID | 攻擊模式名稱 |
|---|---|
| CAPEC-680 | Exploitation of Improperly Controlled Registers
|
提交
| 名稱 | 機構 | 日期 | 發布日期 | Version |
|---|---|---|---|---|
| Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna, Narasimha Kumar V Mangipudi | Intel Corporation | 4.0 |
修改記錄
| 名稱 | 機構 | 日期 | 備註 |
|---|---|---|---|
| CWE Content Team | MITRE | updated Related_Attack_Patterns | |
| CWE Content Team | MITRE | updated Related_Attack_Patterns | |
| CWE Content Team | MITRE | updated Demonstrative_Examples | |
| CWE Content Team | MITRE | updated Relationships | |
| CWE Content Team | MITRE | updated Mapping_Notes | |
| CWE Content Team | MITRE | updated Detection_Factors, Potential_Mitigations, Weakness_Ordinalities | |
| CWE Content Team | MITRE | updated Background_Details, Common_Consequences, Description, Dimensions |
