背景詳情
引入方式
Architecture and Design
Implementation
適用平台
程式語言
類別: Not Language-Specific (Undetermined)
作業系統
類別: Not OS-Specific (Undetermined)
架構
類別: Not Architecture-Specific (Undetermined)
技術
名稱: Memory Hardware (Undetermined)
名稱: Processor Hardware (Undetermined)
名稱: Microcontroller Hardware (Undetermined)
名稱: Network on Chip Hardware (Undetermined)
類別: System on Chip (Undetermined)
常見後果
| 範圍 |
影響 |
可能性 |
| Confidentiality | Read Memory
注意:
An untrusted agent might be blocked from accessing a memory region, but it is not blocked from accessing the corresponding aliased memory region.
| High |
| Integrity | Modify Memory
注意:
An untrusted agent might be blocked from accessing a memory region, but it is not blocked from accessing the corresponding aliased memory region.
| High |
| Availability | DoS: Instability | High |
潛在緩解措施
Phases : Architecture and Design // Implementation
The checks should be applied for consistency access rights between primary memory regions and any mirrored or aliased memory regions. If different memory protection units (MPU) are protecting the aliased regions, their protected range definitions and policies should be synchronized.
Phases : Architecture and Design // Implementation
The controls that allow enabling memory aliases or changing the size of mapped memory regions should only be programmable by trusted software components.
漏洞對應備注
理由說明 : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
備註 : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
相關攻擊模式
| CAPEC ID |
攻擊模式名稱 |
| CAPEC-456 |
Infected Memory
An adversary inserts malicious logic into memory enabling them to achieve a negative impact. This logic is often hidden from the user of the system and works behind the scenes to achieve negative impacts. This pattern of attack focuses on systems already fielded and used in operation as opposed to systems that are still under development and part of the supply chain. |
| CAPEC-679 |
Exploitation of Improperly Configured or Implemented Memory Protections
|
提交
| 名稱 |
機構 |
日期 |
發布日期 |
Version |
| Arun Kanuparthi, Hareesh Khattri, Parbati Kumar Manna, Narasimha Kumar V Mangipudi |
Intel Corporation |
2020-04-29 +00:00 |
2020-02-24 +00:00 |
4.1 |
修改記錄
| 名稱 |
機構 |
日期 |
備註 |
| CWE Content Team |
MITRE |
2020-08-20 +00:00 |
updated Demonstrative_Examples, Description, Modes_of_Introduction, Potential_Mitigations, Related_Attack_Patterns |
| CWE Content Team |
MITRE |
2021-10-28 +00:00 |
updated Potential_Mitigations |
| CWE Content Team |
MITRE |
2022-04-28 +00:00 |
updated Applicable_Platforms, Related_Attack_Patterns |
| CWE Content Team |
MITRE |
2022-06-28 +00:00 |
updated Applicable_Platforms |
| CWE Content Team |
MITRE |
2022-10-13 +00:00 |
updated Demonstrative_Examples |
| CWE Content Team |
MITRE |
2023-01-31 +00:00 |
updated Related_Attack_Patterns |
| CWE Content Team |
MITRE |
2023-04-27 +00:00 |
updated Relationships |
| CWE Content Team |
MITRE |
2023-06-29 +00:00 |
updated Mapping_Notes |
| CWE Content Team |
MITRE |
2025-12-11 +00:00 |
updated Weakness_Ordinalities |
| CWE Content Team |
MITRE |
2026-10-28 +00:00 |
updated Background_Details, Common_Consequences, Demonstrative_Examples, Description |