Internet Security Systems Proventia M Series XPU

CPE Details

Internet Security Systems Proventia M Series XPU
iss
proventia_m_series_xpu
-
2007-08-23
19h05 +00:00
2008-03-25
18h15 +00:00
CPE NVD
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CPE Name: cpe:2.3:h:iss:proventia_m_series_xpu:-:*:*:*:*:*:*:*

Informations

Vendor

iss

Product

proventia_m_series_xpu

Version

-

Related CVE

Open and find in CVE List

CVE ID Published Description Score Severity
CVE-2007-2690 2007-05-15 23h00 +00:00 Multiple IBM ISS Proventia Series products, including the A, G, and M series, do not properly handle certain full-width and half-width Unicode character encodings, which might allow remote attackers to evade detection of HTTP traffic.
7.8
CVE-2006-3840 2006-07-27 08h00 +00:00 The SMB Mailslot parsing functionality in PAM in multiple ISS products with XPU (24.39/1.78/epj/x.x.x.1780), including Proventia A, G, M, Server, and Desktop, BlackICE PC and Server Protection 3.6, and RealSecure 7.0, allows remote attackers to cause a denial of service (infinite loop) via a crafted SMB packet that is not properly handled by the SMB_Mailslot_Heap_Overflow decode.
5
The information presented on CVE Find originates from several carefully selected reference sources. CVE data is provided by MITRE Corporation and the National Vulnerability Database (NVD). The Known Exploited Vulnerabilities (KEV) catalog is sourced from the Cybersecurity and Infrastructure Security Agency (CISA), while EPSS scores come from FIRST.org. Additionally, data regarding software weaknesses (CWE) and common attack patterns (CAPEC) is maintained by MITRE Corporation, and information on hardware and software configurations (CPE) is provided by the NVD.