Modes d'introduction
Integration
Manufacturing
Plateformes applicables
Langue
Name: VHDL (Undetermined)
Name: Verilog (Undetermined)
Class: Compiled (Undetermined)
Systèmes d’exploitation
Class: Not OS-Specific (Undetermined)
Architectures
Class: Not Architecture-Specific (Undetermined)
Technologies
Name: Other (Undetermined)
Class: Not Technology-Specific (Undetermined)
Conséquences courantes
| Portée |
Impact |
Probabilité |
Confidentiality Integrity Availability Access Control Accountability Authentication Authorization Non-Repudiation | Modify Memory, Read Memory, Modify Files or Directories, Read Files or Directories, Modify Application Data, Execute Unauthorized Code or Commands, Gain Privileges or Assume Identity, Bypass Protection Mechanism
Note: Once unlock credentials are compromised, an attacker can use the credentials to unlock the device and gain unauthorized access to the hidden functionalities protected by those credentials. | |
Mesures d’atténuation potentielles
Phases : Integration
Ensure the unlock credentials are shared with the minimum number of parties and with utmost secrecy. To limit the risk associated with compromised credentials, where possible, the credentials should be part-specific.
Phases : Manufacturing
Ensure the unlock credentials are shared with the minimum number of parties and with utmost secrecy. To limit the risk associated with compromised credentials, where possible, the credentials should be part-specific.
Notes de cartographie des vulnérabilités
Justification : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Commentaire : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
Modèles d'attaque associés
| CAPEC-ID |
Nom du modèle d'attaque |
| CAPEC-560 |
Use of Known Domain Credentials
|
Notes
This entry is still under development and will continue to see updates and content improvements.
Soumission
| Nom |
Organisation |
Date |
Date de publication |
Version |
| Parbati Kumar Manna, Hareesh Khattri, Arun Kanuparthi |
Intel Corporation |
2020-05-29 +00:00 |
2020-02-24 +00:00 |
4.1 |
Modifications
| Nom |
Organisation |
Date |
Commentaire |
| CWE Content Team |
MITRE |
2020-08-20 +00:00 |
updated Demonstrative_Examples, Description, Related_Attack_Patterns |
| CWE Content Team |
MITRE |
2021-10-28 +00:00 |
updated Demonstrative_Examples, Description |
| CWE Content Team |
MITRE |
2022-10-13 +00:00 |
updated Description |
| CWE Content Team |
MITRE |
2023-04-27 +00:00 |
updated Relationships |
| CWE Content Team |
MITRE |
2023-06-29 +00:00 |
updated Mapping_Notes |
| CWE Content Team |
MITRE |
2025-04-03 +00:00 |
updated Demonstrative_Examples |
| CWE Content Team |
MITRE |
2025-12-11 +00:00 |
updated Weakness_Ordinalities |