CWE-1209 Detalhe

CWE-1209

Failure to Disable Reserved Bits
2020-02-24
00h00 +00:00
Incomplete
2026-10-28
00h00 +00:00
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Nome: Failure to Disable Reserved Bits

The reserved bits in a hardware design are not disabled prior to production.

Informações Gerais

Detalhes de Contexto

Modos de Introdução

Array : The Designer and Implementer have to make a conscious choice to do this. Designers might covertly use reserved bits to debug or further develop new capabilities in production hardware. Designers might want to use these bits to debug or control/configure a future capability to help minimize time to market (TTM).
Documentation : If documentation labels anything "for future use", "reserved", or the like, such labeling could indicate to an attacker a potential attack point.

Plataformas Aplicáveis

Linguagem

Classe: Not Language-Specific (Undetermined)

Sistemas Operacionais

Classe: Not OS-Specific (Undetermined)

Arquiteturas

Classe: Not Architecture-Specific (Undetermined)

Tecnologias

Classe: System on Chip (Undetermined)

Consequências Comuns

Escopo Impacto Probabilidade
Confidentiality
Integrity
Availability
Access Control
Accountability
Authentication
Authorization
Non-Repudiation
Varies by Context

Nota: If the logic being controlled by these bits is still enabled in production, an adversary could use the logic to induce unwanted/unsupported behavior in the hardware. Adversaries with access to these bits will write to them in hopes of compromising hardware state. This type of weakness all depends on the capabilities of the logic being controlled or configured by the reserved bits.

Mitigações Potenciais

Phases : Architecture and Design // Implementation
Phases : Integration

Notas de Mapeamento de Vulnerabilidade

Justificativa : This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Comentário : Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.

Padrões de Ataque Relacionados

CAPEC ID Nome do Padrão de Ataque
CAPEC-121 Exploit Non-Production Interfaces

Submissão

Nome Organização Data Data de lançamento Version
Brent Sherman Intel Corporation 2020-02-06 +00:00 2020-02-24 +00:00 4.0

Modificações

Nome Organização Data Comentário
CWE Content Team MITRE 2020-08-20 +00:00 updated Related_Attack_Patterns
CWE Content Team MITRE 2021-10-28 +00:00 updated Potential_Mitigations
CWE Content Team MITRE 2022-10-13 +00:00 updated Demonstrative_Examples
CWE Content Team MITRE 2023-01-31 +00:00 updated Demonstrative_Examples
CWE Content Team MITRE 2023-04-27 +00:00 updated Relationships
CWE Content Team MITRE 2023-06-29 +00:00 updated Mapping_Notes
CWE Content Team MITRE 2025-12-11 +00:00 updated Weakness_Ordinalities
CWE Content Team MITRE 2026-10-28 +00:00 updated Background_Details, Common_Consequences, Description, Modes_of_Introduction, Time_of_Introduction